CSD25302Q2 www.ti.com slps234a ? november 2009 ? revised october 2010 p-channel nexfet ? power mosfet 1 features product summary ? ultralow q g and q gd v ds drain to source voltage ? 20 v ? low thermal resistance q g gate charge total ( ? 4.5v) 2.6 nc ? avalanche rated q gd gate charge gate to drain 0.5 nc ? pb free terminal plating v gs = ? 1.8v 71 m ? r ds(on) drain to source on resistance v gs = ? 2.5v 56 m ? ? rohs compliant v gs = ? 4.5v 39 m ? ? halogen free v gs(th) threshold voltage ? 0.65 v ? son 2-mm 2-mm plastic package ordering information applications device package media qty ship ? battery management son 2-mm 2-mm 13-inch tape and CSD25302Q2 3000 ? load management plastic package reel reel ? battery protection absolute maximum ratings description t a = 25 c unless otherwise stated value unit v ds drain to source voltage ? 20 v the device has been designed to deliver the lowest v gs gate to source voltage 8 v on resistance and gate charge in the smallest outline continuous drain current, t c = 25 c ? 5 a possible with excellent thermal characteristics in an i d ultra low profile. low on resistance coupled with the continuous drain current (1) ? 5 a extremely small footprint and low profile make the i dm pulsed drain current, t a = 25 c (2) ? 20 a device ideal for battery operated space constrained p d power dissipation 2.4 w applications. t j , operating junction and storage ? 55 to 150 c t stg temperature range top view (1) package limited (2) pulse duration 10 s, duty cycle 2% r ds(on) vs v gs gate charge 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. copyright ? 2009 ? 2010, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. 1 s 2 s s 3 s 4 s 5 g 6 d d p0112-01 ?v gs ? gate to source v oltage ? v 0 25 50 75 100 125 150 1 2 3 4 5 6 7 8 r ds(on) ? on-state resistance ? m w g006 i d = ?3a t c = 125 c t c = 25 c q g ? gate charge ? nc 0 1 2 3 4 5 6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 ?v gs ? gate voltage ? v g003 i d = ?3a v ds = ?10v
CSD25302Q2 slps234a ? november 2009 ? revised october 2010 www.ti.com electrical characteristics t a = 25 c, unless otherwise specified parameter test conditions min typ max unit static characteristics bv dss drain to source voltage v gs = 0v, i ds = ? 250 m a ? 20 v i dss drain to source leakage v gs = 0v, v ds = ? 16v ? 1 m a i gss gate to source leakage v ds = 0v, v gs = 8v ? 100 na v gs(th) gate to source threshold voltage v ds = v gs , i ds = ? 250 m a ? 0.5 ? 0.65 ? 0.9 v v gs = ? 1.8v, i ds = ? 3.0a 71 92 m ? r ds(on) drain to source on resistance v gs = ? 2.5v, i ds = ? 3.0a 56 70 m ? v gs = ? 4.5v, i ds = ? 3.0a 39 49 m ? g fs transconductance v ds = ? 10v, i ds = ? 3.0a 12.3 s dynamic characteristics c iss input capacitance 270 350 pf c oss output capacitance v gs = 0v, v ds = ? 10v, f = 1mhz 120 150 pf c rss reverse transfer capacitance 40 55 pf q g gate charge total ( ? 4.5v) 2.6 3.4 nc q gd gate charge ? gate to drain 0.5 nc v ds = ? 10v, i ds = ? 3.0a q gs gate charge gate to source 0.54 nc qg(th) gate charge at vth 0.2 nc q oss output charge v ds = ? 13v, v gs = 0v 2.3 nc t d(on) turn on delay time 3.2 ns t r rise time 13.2 ns v ds = ? 10v, v gs = ? 4.5v, i ds = ? 3.0a, r g = 2 ? t d(off) turn off delay time 8.6 ns t f fall time 1.3 ns diode characteristics v sd diode forward voltage i ds = ? 3.0a, v gs = 0v ? 0.8 ? 1.0 v q rr reverse recovery charge 2.5 nc v dd = ? 13v, i f = ? 3.0a, di/dt = 300a/ m s t rr reverse recovery time 8.8 ns thermal characteristics t a = 25 c, unless otherwise specified parameter min typ max unit r q jc thermal resistance junction to case (1) 8.6 c/w r q ja thermal resistance junction to ambient (1) (2) 66 c/w (1) r q jc is determined with the device mounted on a 1-inch 2 (6.45-cm 2 ), 2-oz. (0.071-mm thick) cu pad on a 1.5-inch 1.5-inch (3.81-cm 3.81-cm), 0.06-inch (1.52-mm) thick fr4 pcb. r q jc is specified by design, whereas r q ja is determined by the user ? s board design. (2) device mounted on fr4 material with 1-inch 2 (6.45-cm 2 ), 2-oz. (0.071-mm thick) cu. 2 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated
CSD25302Q2 www.ti.com slps234a ? november 2009 ? revised october 2010 max r q ja = 66 c/w max r q ja = 207 c/w when mounted on when mounted on 1 inch 2 (6.45 cm 2 ) of minimum pad area of 2-oz. (0.071-mm thick) 2-oz. (0.071-mm thick) cu. cu. typical mosfet characteristics t a = 25 c, unless otherwise specified figure 1. transient thermal impedance copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 3 gate source drain m0161-02 t p ? pulse duration ? s z q ja ? normalized thermal impedance 0.0001 0.01 10 1k 0.001 1 10 0.1 0.1 100 1 g012 single pulse 0.01 0.02 0.05 0.1 0.3 0.5 duty cycle = t 1 /t 2 t ypical r q ja = 166 c/w (min cu) t j = p z q ja r q ja p t 1 t 2 0.01 0.001 gate source drain m0161-01
CSD25302Q2 slps234a ? november 2009 ? revised october 2010 www.ti.com typical mosfet characteristics (continued) t a = 25 c, unless otherwise specified figure 2. saturation characteristics figure 3. transfer characteristics figure 4. gate charge figure 5. capacitance figure 6. threshold voltage vs. temperature figure 7. on-state resistance vs. gate to source voltage 4 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated t c ? case t emperature ? c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 ?75 ?25 25 75 125 175 ?v gs(th) ? threshold v oltage ? v g005 i d = ?250 m a ?v gs ? gate to source v oltage ? v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.5 0.7 0.9 1.1 1.3 1.5 ?i d ? drain current ? a g002 v ds = ?5v t c = ?55 c t c = 25 c t c = 125 c ?v ds ? drain to source v oltage ? v 0.0 0.1 0.2 0.3 0.4 0 5 10 15 20 c ? capacitance ? nf g004 f = 1mhzv gs = 0v c rss = c gd c oss = c ds + c gd c iss = c gd + c gs ?v gs ? gate to source v oltage ? v 0 25 50 75 100 125 150 1 2 3 4 5 6 7 8 r ds(on) ? on-state resistance ? m w g006 i d = ?3a t c = 125 c t c = 25 c ?v ds ? drain to source v oltage ? v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.0 0.2 0.4 0.6 0.8 1.0 ?i d ? drain current ? a g001 v gs = ?4.5v v gs = ?2.5v v gs = ?3.5v v gs = ?1.8v v gs = ?2v q g ? gate charge ? nc 0 1 2 3 4 5 6 0.0 0.5 1.0 1.5 2.0 2.5 3.0 ?v gs ? gate voltage ? v g003 i d = ?3a v ds = ?10v
CSD25302Q2 www.ti.com slps234a ? november 2009 ? revised october 2010 typical mosfet characteristics (continued) t a = 25 c, unless otherwise specified figure 8. normalized on-state resistance vs. temperature figure 9. typical diode forward voltage figure 10. maximum safe operating area figure 11. maximum drain current vs. temperature copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 5 0.0 0.2 0.4 0.6 0.8 1.0 ?v sd ? source to drain v oltage ? v g008 t c = 25 c 10 1 0.01 0.0001 0.001 0.1 ?i sd ? source to drain current ? a t c = 125 c t c ? case t emperature ? c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 ?75 ?25 25 75 125 175 normalized on-state resistance g007 i d = ?3a v gs = ?4.5v ?v d ? drain v oltage ? v g009 0.01 0.1 10 100 1 1ms 10ms dc single pulset ypical r q ja = 166 c/w (min cu) area limitedby r ds(on) 100 10 0.01 1 ?i d ? drain current ? a 0.1 100ms 1s t c ? case t emperature ? c 0 1 2 3 4 5 6 ?50 ?25 0 25 50 75 100 125 150 175 ?i d ? drain current ? a g011
CSD25302Q2 slps234a ? november 2009 ? revised october 2010 www.ti.com mechanical data q2 package dimensions millimeters inches dim min nom max min nom max a 0.700 0.750 0.800 0.028 0.030 0.032 a1 0.000 0.050 0.000 0.002 b 0.250 0.300 0.350 0.010 0.012 0.014 c 0.203 typ 0.008 typ d 2.000 typ 0.080 typ d1 0.900 0.950 1.000 0.036 0.038 0.040 d2 0.300 typ 0.012 typ e 2.000 typ 0.080 typ e1 0.900 1.000 1.100 0.036 0.040 0.044 e2 0.280 typ 0.0112 typ e3 0.470 typ 0.0188 typ e 0.650 bsc 0.026 typ k 0.280 typ 0.0112 typ k1 0.350 typ 0.014 typ k2 0.200 typ 0.008 typ k3 0.200 typ 0.008 typ k4 0.470 typ 0.0188 typ l 0.200 0.25 0.300 0.008 0.010 0.0121 6 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated m0175-01 d 1 1 3 3 4 4 6 6 b e2 k l a1 c top view bottom view front view e pin 1 dot pin 1 id e d1 e1 k3 k1 d2 k2 k4 a e3 2 5 2 5 7 pinout source 1, 2, 5, 6, 8 gate 3 drain 4, 7 8
CSD25302Q2 www.ti.com slps234a ? november 2009 ? revised october 2010 recommended pcb pattern note: all dimensions are in mm, unless otherwise specified. for recommended circuit layout for pcb designs, see application note slpa005 ? reducing ringing through pcb layout techniques . q2 tape and reel information notes: 1. measured from centerline of sprocket hole to centerline of pocket 2. cumulative tolerance of 10 sprocket holes is 0.20 3. other material available 4. typical sr of form tape max 10 8 ohm/sq 5. all dimensions are in mm, unless otherwise specified. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 7 2.00 0.05 ? 1.50 0.10 1.75 0.10 ? 1.00 0.25 m0168-01 8.00 +0.30 C0.10 4.00 0.10 4.00 0.10 3.50 0.05 10 max 10 max 0.254 0.02 1.00 0.05 2.30 0.05 2.30 0.05 0.25 0.22 m0167-01 2.30 1.10 1.40 1 0.40 typ 0.65 typ 0.85 0.46 1.05
CSD25302Q2 slps234a ? november 2009 ? revised october 2010 www.ti.com revision history changes from original (november 2009) to revision a page ? deleted the package marking information section ............................................................................................................... 8 8 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated
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